India
Research Article
Design of Efficient Linear Feedback Shift Register for BCH Encoder
Author(s): Aiswarya S and Manikandan SKAiswarya S and Manikandan SK
The sequential circuit designed was Look-Ahead Transformation based LFSR in which a hardware complexity was present and it may limit their employ in many applications. The design of efficient LFSR for BCH encoder using TePLAT (Term Preserving Look-Ahead Transformation) overcame this limitation by opening the employ of minimizing the iteration bound and hardware complexity in wide range of applications. A TePLAT convert LFSR formulation behaves in the same way to achieve much higher throughput than those of a native implementation and a Look-Ahead Transformation-based... Read More»
DOI:
10.4172/2332-0796.1000138
Journal of Electrical & Electronic Systems received 733 citations as per Google Scholar report