High-K/Metal Gate (HK/MG) stacks on high mobility channel substrates for advance CMOS technology

6^th International Conference and Exhibition on Materials Science and Engineering

September 12-14, 2016 Atlanta, USA

Ashok Mahajan

North Maharashtra University, India

Posters & Accepted Abstracts: J Material Sci Eng

Abstract :

In the several years, there is enormous development in the complementary metal-oxide-semiconductor (CMOS) technology. To follow the ITRS projected parameters and Moore�s law, the Ge has attracted much attention due to its higher carrier motilities than silicon for high mobility channel devices. Further, Ge/high-k technology is in account, with different passivation techniques to form an intentional interfacial layer between Ge and high-k. In this context, we have deposited and studied various structural and electrical properties of high-k dielectrics on Ge and SiC. Initially, the high-k thin film of HfO2 was deposited by using Plasma Enhanced Atomic Layer Deposition (PE-ALD) technique on Ge. The electron beam evaporation system was used to deposit the Ti/Pt metal bilayer to fabricate the Pt/Ti/HfO2/Ge MOS capacitors. Further, the ZrO2 and HfO2/Al2O3 ultra-thin films were deposited on p-type (100), (110), (111) Ge by using the plasma enhanced atomic layer deposition (PEALD) and Ti/Pt. Cr/Au have been deposited using ebeam evaporation system to form the MOS structures. The XPS has been used to study the composite properties of these deposited films. HRTEM and AFM used to study the interface and surface morphology. The C-V and I-V measurements were used to calculate the dielectric constant, barrier height, effective oxide charge and density of interface traps of the fabricated different MOS structures. In addition to this, the study of ZrO2 high-k dielectrics on 4H-SiC have also been carried out. Overall, the different novel HK/MG gate stacks have been studied for their suitability for CMOS technology.

Biography :

Email: ammahajan@nmu.ac.in